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SSD PCB Design Case

[Single board type] SSD solid-state drive

[Pin number] 6213

[Layers] 8 layers

[Maximum rate] 8Gb/s

[Difficulties]:

1. 32 pieces of Nand-flash design, compatible with ONFI and Toggle two protocols;

2. The plate thickness is 1.0mm, the cost is high, and the cascading design is limited;

3. After the simulation, the signal reach to each chip needs the same length;

4. As the number of Nand-flash is relatively large, the heat generation is relatively large too, we need to consider the heat dissipation problem;


[Our countermeasures]:

1. There is almost no wiring space at the top-bottom layer as the structural limited and the layout is tight; according to evaluation, it needs 2-3 inner layers at least for Nand's line, plus other miscellaneous wires and power supplies, the cascade needs to be designed as an 8-layer board and 3 inner layers. and the T-shaped structure is used for routing; the wiring topology and layout are as follows:


SSD PCB Design Case

SSD PCB Design Case


2. Due to considering the customer's batching cost, the number of layers can not be too many, moreover, it should be strictly controlled both of the impedance and the same length on the Nand line and PCIE3.0 on the board. We need to communicate with the customer and SI at the early stage so that the number of layers, wiring equal length and impedance requirements can be satisfied at the same time; The actual design of the cascade is as follows (using an unconventional asymmetric cascade to meet the wiring. the power layer handles some local short signals to meet the reference ground plane):


SSD PCB Design Case


3.5/6 is the design of the adjacent layer, the wiring is staggered. Because the 5th layer processes the DQ signal, there is only a small part of the signal is processed in the 6th layer, the rest large area should be laid the power supply. and ground planes are used for reference reflow; most of the important signals need to be processed at the third level;


4. As the board is thin, in the circumstances of the inner layer does not affect the impedance of the adjacent layer traces, the GND copper is mostly irrigated in the spare place to avoid the board bending;


SSD PCB Design Case

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+86-183 1234 0501